6 thoughts on “Featured Projects”

  1. Hello Sam!
    What you do in your garage looks very impressive for me,
    nice, that you share it.
    I do some similar things at home and have put together in my cellar, a RF plasma chamber (cap coupl, 6 in), a thermal evaporator (Ta boats, glow discharge for preclean, 6 in), RGA´s (Quadrex and Transpector), a spincoater etc.. Most stuff is from Leybold, some MKS and Edwards. I do not have a complete IC line like you, but several parts. I am working in southern Germany.
    The evaporator is used regularly for preparing thin layers as corrosion test targets and the plasma chamber is used for samples to clean mostly, sometimes to deposit plasmapolymers.
    Maybe, we can help each other with manuals or design tips, exchange of materials or doing a process step is more difficult. Such hobbyists like us are very rare, I know one other colleague in germany.
    Best Regards
    Lutz
    (I am a chemist, half a decade old, working in automotive)

  2. Hi Sam.

    I would like to make you aware of a few things that may be of assistance to you.

    There is a chip type Minimum Instruction Set Computer (MISC). The versions based on reverse polish notation stack based (Forth computer Language like) are the highest performance smallest circuits. Such a processor should fit in 4000 transistors, even much less I would expect.

    The leader in this field, is greenarrays, but, their current designs are extremely low level, and not suitable for conventional programming, but has the lowest energy processor record.
    They also have a educational charity initiative to teach chip design. The designer, Chuck More, had a chip design tool, OKCAD, he used which was 3 or 4 Kilobytes big. It used easy tiling, and eventually by setting up parameters for the process, produced reliable results, at much better efficiency and timing than conventional chip design tools. Currently the tool has gone forwards and allows conversion between formats, from what I understand, allowing output in a format a fab can use.

    He has done more conventional designs in the past, with a few performance records. The design for Jeff Fox (deceased) was the last conventional design, and just before a start up called ITV. The Misc series started with the Mup21 by C.H. Ting, around 1990. All these chips should have display and peripheral circuits, and probably 6500-10,000 transistors plus, and most 20 bits+ (and old memory format). C.H. Ting, has also done a series of FPGA versions up to 32 bits, which might be open source. It might be possible to get a hold of these designs. The Jeff Fox (Ultra Technology) design was aimed at 500Mhz, but currently the green array design dues around 666mhz at 4.5 or 3.5mw, on 180nm processor node, idling, not over driven like most cpus. So, over driven, such designs may get into a number of GHz, with a modest to no active cooling solution, at 180nm (this is speculation, as the current designs are aimed at low energy and the 180nm process node is a low energy process). It uses asynchronous timing, between the on chip processor array, so, can do very low cycles and sleep inbetween. Not over driving the circuits results in low leakage. Really a wealth of knowledge there.

    The cut down version of the forth computer language for these, is generally colour forth, which is close to its assembler.

  3. I would also like to point out that there was a way to make low cost chip prototyping in the 1980’s, using ion beam drawing (they is another using silicon stamp technology too, but that’s probably going be harder). I think near Cambridge England.

    There is also a company called Microvision, that makes a controllable mirror on chip for laser projection, which might be worth looking at to draw chip designs. I have another technique I had wanted to use for a laser projector, which I do not want to speak publically about here.

    Currently Quantum Dot lasers are a thing as well.

    These techniques might be of benefit to you.

    I should also ask, have you thought, to eventually make a continuous little all in one production line device. A little circular table, with sections that smooth coated a base material, then costed the chip layers (the silicon layer being a coating) and design in sealed sections, with a stack of finished wafers on one end, and a stack of blanks at the start. Fully automated? The next step would be sections to cut and package the chips using pinless technology (magnetic induction, being am extreme, not requiring external pins). There is simply no desktop fab for small companies to make their own chips on open source chip designs.

    Thank you.

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